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Testbench Operation and Modification
word counts 1 to 9. "External Command Word Legality Example" on page 54 shows the source code for
a command legality module implementing this behavior.
The procedural testbench has direct control of the bus control modules, the transceivers, and the
backend interfaces (including all the backend core inputs). This direct control allows the testbench to
initialize the backend RAM contents and to verify the contents after each transfer. The bus controller
function has the capability of injecting errors and varying the data rate to verify the 1553B decoder
behavior.
During operation, the testbench verifies all command, data, and status words. All memory accesses are
verified, and the resultant transfer status word for every message is checked.
During invocation, the top-level generics can be set to alter the simulation. These generics are specified
in Table 6-2 .
Table 6-2 ? Verification Testbench RT Configuration
Generic
ENBUSMON
Type
Boolean
Default Value
FALSE
Function
Enables the bus monitor function. The testbench displays
every 1553B word that is transmitted on the busses.
ENRAMMON Boolean
FALSE
Enables the RAM monitor function. The testbench displays
all the memory reads and writes performed by each of the
cores.
RUNTEST
Integer
0
Allows the testbench to run without user input. Forces the
testbench to run the test number as defined by the menus
(see below). If RUNTEST is greater than 10, the testbench
runs test number (n – 10) and quits; for example, if n = 12,
the testbench runs test number (12 – 10 = 2), which is
“Microsemi Tests – Standard Mode,” and then quits the
simulation.
When you run the testbench, it asks which tests you want to run. The options are as follows (the options
are summarized in Table 6-3 on page 39 ):
# 1553B Test Harness - Microsemi IP Solutions Group
# Production Release 4.0 14 January 2014
#
# Test Options
# 1 : Quick Run
# 2 : Microsemi Tests - Standard Mode
# 3 : Microsemi Tests - Address Mapper Enabled
# 4 : RT Test Plan
# 5 : Microsemi Tests - Short mode (i.e. fewer tests)
# 9 : Do Everything
# A : Do Everything, Monitors Off and Quit
# B : Turn On Bus Monitors
# R : Turn On RAM Monitors
# P : Pause Simulation - allows waves to update
# X : Run for a single 1553B Word; i.e. 20μs
# M : Send a message M BUS RT TX SA WC [SEED INC]
# D : Display RT Memory D RT TX SA
# S : Set RT Memory S RT TX SA SEED INC
# Q : Quit
#
# Enter Option, for demo use 1 ?
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